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This seems to be an AGC problem. Most COM-10xx digital demodulators generate a pulse-width modulated AGC signal to control the gain of the COM-300x RF receiver. The digital demodulator detects saturation at the Analog-to-Digital conversion ("1111111111" or "0000000000" samples) and adjusts the gain accordingly. Use an oscilloscope to probe the interface connector at pin B13 (top level, 13 row). This pulse-width modulated signal should react to input signal level variations by varying the duty cycle.

Possible causes:

(a) the digital demodulator clock selection is wrong: be sure to select 'external' clock selection.
(b) the digital demodulator input format selection is wrong: be sure to select 'unsigned' format.
(c) the digital demodulator firmware is not loaded properly. Using the ComBlock Control Center software, check the software version/option consistency (property window, configuration section, bottom half). If strange characters show up in the version/option field, please reload the FPGA bit file.
(d) a wrong or older firmware file was loaded. Please go to www.comblock.com/download.htm to download the latest firmware version.


 

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