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-- MSS copyright 2011-2012
--	Filename:  PHYSIM_RGMII.vhd
-- Author: Alain Zarembowitch / MSS
--	Version: 2
--	Date last modified: 8/5/12
-- Inheritance: 	N/A
-- 
-- description:  simple simulation of an Ethernet PHY with RGMII interface. 
-- It can be configured to mimic 10/100/1000 Mbps (change RXC_period)
-- It loops tx back to rx after a fixed delay.
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity PHYSIM_RGMII is
    Port ( 
		TXC: IN std_logic;  -- tx clock
		TXD: IN std_logic_vector(3 downto 0);  -- tx data
		TX_CTL: IN std_logic;  -- tx control: combines TX_EN and TX_ER
			-- valid at the falling clock edge
		
		RXC: OUT std_logic;  -- receive clock
			-- must be delayed by 1.5 to 2.1 ns to prevent glitches
		RXD: OUT std_logic_vector(3 downto 0);  -- receive data
		RX_CTL: OUT std_logic;  -- receive control. combines RX_DV and RX_ER
			-- valid at the falling clock edge
			-- Note: Micrel KSZ9021RN PHY defines these as dual-function signals.
			-- Set the strapping options in the .ucf constraint file.
		RESET_N: IN std_logic;
			-- PHY reset
		MCLK: IN std_logic;
		MDIO: INOUT std_logic;  -- (tri-state)
			-- serial interface
		CLK125_NDO: OUT std_logic
			-- clean 125 MHz clock
		
 );
end entity;

architecture Behavioral of PHYSIM_RGMII is
   constant CLK125_NDO_period : time := 8 ns;  -- 125 MHz
	-- The received clock is indicative of the link speed. 125 MHz -> 1000Mbps, 25 MHz -> 100Mbps, 2.5 MHz -> 10Mbps
constant RXC_period : time := 8 ns;  -- 125 MHz + drift
--constant RXC_period : time := 39.12345678 ns;  -- 25 MHz + drift
--constant RXC_period : time := 390.1 ns;  -- 2.5 MHz + drift

begin

   CLK125G_process :process
   begin
		CLK125_NDO <= '0';
		wait for CLK125_NDO_period/2;
		CLK125_NDO <= '1';
		wait for CLK125_NDO_period/2;
   end process;
	
   RXC_process :process
   begin
		RXC <= '0';
		wait for RXC_period/2;
		RXC <= '1';
		wait for RXC_period/2;
   end process;
	
	-- loopback after a specified delay
	RXD <= transport TXD after 6 ns;
	RX_CTL <= transport TX_CTL after 6 ns;
--	
--	RXD <= "0000";
--	RX_CTL <= '0';
	



end Behavioral;

