COM-1002 BPSK/QPSK/OQPSK digital modulator -> COM-1001 BPSK/QPSK/OQPSK digital demodulator -> COM-1005 BER measurement

Setup:
Modulation: 40 Ksymbols/s, QPSK, 40 KHz carrier.

Note1: The modulator interpolation is turned off as the interpolation filters are centered
around zero frequency and thus affect the gain flatness when the center frequency 
offset is large relatively to the modulation symbol rate.

Note2: the demodulator resamples the complex I/Q input at 40 MHz, then decimates to 160 KHz 
(4* symbol rate).

Procedure:

(a) power up the ComBlock assembly. Wait 5 seconds. 
Using the Comblock control center File|Import menu, 
load the settings file 1002_1001_1005b.stn.

(b) turn the power off, and then on.


Proper operation can be verified as follows:

(a) using an oscilloscope probe:

COM-1001 TP3 shows a 40 KHz recovered carrier

COM-1001 TP4 shows the 80 KHz 2* recovered symbol rate

COM-1005 TP1 is high, indicating synchronization with the 2047-bit periodic test pattern 

COM-1005 TP3 is low, showing no bit error pulse 

COM-1005 TP4 shows regular periodic start of frame pulses every 2*2047 bits = 51.175ms.
Trigger on COM-1005 TP4, and compare demodulated bits (COM-1005 TP5/TP6) with the 
transmitted bits (COM-1002 TP2/TP3). The bits should be identical, taking into account processing
delay and inversions due to QPSK phase ambiguity. 

(b) from the ComBlock control center check the BER (COM-1005 status).
It will show no bit errors (REG 1 through 4) and the synchronization bit (REG5 bit0) is high.