COM-3001 Dual Band 915 MHz / 2.4 GHz receiver -> FSK/MSK/GFSK/GMSK demodulator COM-1001
-> COM-1005 BER measurement

The baseline configuration in the 3001_1027_1005.stn settings file is as follows:
2.5 GHz center frequency
9.8 Mbit/s FSK, GFSK modulation
Internal 10 MHz frequency reference.
-56 dBm input level threshold for full scale 10-bit A/D conversion.

Purpose: test the GFSK modulator end-to-end
The assembly consists of two sections: a transmitter section and a receiver section.
The transmitter and receiver are connected through a 20 dB - 30 dB attenuator.
The transmitter is configured using the 1028_2001_4001.stn settings file.
The receiver is configured using the 3001_1027_1005.stn settings file.
 
(a) Assemble the transmitter section and configure as per the instructions 
in 1028_2001_4001.txt

(b) assemble the receiver section. turn the power supply on. Import the 
3001_1027_1005.stn setting file into the assembly 
(from the ComBlock Control Center  File | Import menu).

(c) Connect the transmitter and receiver sections via a 20 or 30 dB attenuator. 

(d) Using an oscilloscope, verify that the COM-1005 BER measurement module is synchronized
with the PRBS-11 pseudo-random transmitted sequence:
- COM-1005 TP1 is high, indicating synchronization with the 2047-bit periodic test pattern 
- COM-1005 TP3 is low, showing no bit error pulse 
- COM-1005 TP4 shows regular periodic start of frame pulses every 2047 bits = 208.8 us.

(e) from the ComBlock control center check the BER (COM-1005 status).
It will show no bit errors  or very low bit error rate (< 10-6) (REG 1 through 4) 
and the synchronization bit (REG5 bit0) is high.

(f) from the ComBlock control center check the demodulator lock status (COM-1027 status,
Register REG16 = 3, indicating both signal power detection and AFC lock.
Register REG12/13/14 should show the frequency error (representative of the 50ppm clock 
drift @2.5 GHz at the COM-3001 frequency synthesizer using internal clock).