Turbo code encoder COM-7001 -> DSSS modulator COM-1019 -> 
DSSS demodulator COM-1018 -> Turbo code decoder COM-7001 -> BER measurement COM-1005.

Important note: this setup requires that an external 40 MHz clock be provided to the 
COM7001 at the input J2/ pin A1.

Test configuration example: 
- 19.99 Mchip/s direct-sequence spread-spectrum, QPSK
- Barker code length 13.
- Data rate: 3.06 Mbit/s


The turbo-code encoder is placed in signal generator test mode, 
whereby a periodic 2047-bit sequence (PRBS-11) is being transmitted. 
The resulting data stream is FEC encoded, DSSS modulated, DSSS demodulated, FEC decoded. 
The end to end BER is measured using the COM-1005 module. 

Proper operation can be verified as follows:

(a) using an oscilloscope probe:

COM-7001 encoder, Pin B1, Connector J3 shows the 3.06 Mbit/s bit clock
(800 ns pulse = 32 samples, period = 10.40 us)

COM-1018 J4/B7 is high, indicating DSSS demodulator carrier lock 
COM-1018 J4/A7 is high, indicating DSSS demodulator code lock

COM-7001 decoder  TP4 shows periodic start of frame pulses every Turbo-code block 
(4096 bits + 32 bit unique word = 1.348 ms @ 3.06 Mbit/s). 

COM-7001 decoder TP2 D_GOUT shows how much decoding capacity is used in the Turbo code 
decoder for this configuration (3.06 Mbit/s, 0.793 code rate, 6 decoding iterations). 
The duty cycle indicates the available capacity: 52.5% capacity available. 

COM-1005 TP1 is high, indicating synchronization with the 2047-bit periodic test pattern 

COM-1005 TP3 is low, showing no bit error pulse.


(b) from the ComBlock control center check the BER (COM-1005 status).
It will show no bit errors (REG 1 through 4) and the synchronization bit (REG5 bit0) is high.
Depending on the demodulated phase ambiguity, the BER can be either 0 (no inverted bit) 
or 0x0F4240 (all bits inverted).