Direct-Sequence Spread-Spectrum Demodulator 60 Mchips/s

  • Direct-Sequence Spread-Spectrum (DSSS) demodulation with flexible configuration:
    • Variable chip rate up to 60 Mchips/s
      Speading factor 3 to 2047
      Maximum processing gain: 33 dB
      BPSK, QPSK selectable
      Programmable center frequency
  • Spreading codes:
    • Gold sequences
      Maximal length sequences
      Barker codes (length 11, 13)
      GPS C/A codes
      Truncated codes
      Code period can be (significantly) longer than symbol period: Maximal code period: 65535
  • Demodulation performances: within 1.5 dB from theory at threshold Eb/No of 2 dB
  • 30-bin parallel code search for fast code acquisition. False code lock prevention
  • Accurate time of arrival pulse generated once per code period (can be used for round-trip delay measurement for example)
  • Monitoring:
    • Bit error rate
      Receiver lock
      Carrier frequency error
  • Demodulator data outputs: 4-bit soft-quantized to
    • Synchronous serial interface, or
      USB 2.0, or
      GbE LAN / TCP-IP socket (through COM-5102 LAN adapter)
    ComScope-enabled: key internal signals can be captured in real-time and displayed on the host computer
  • Connectorized 3x 3 module for ease of prototyping. Single 5V supply with reverse voltage and overvoltage protection. Interfaces with 3.3V LVTTL logic
  • DSSS demodulator COM1518

    Input Output
    COM-300x RF/IF/Baseband receivers COM-1509 Convolutional error correction codec, K=5,7,9
    COM-1824 Channel Emulator (Doppler, delay, fading, noise) COM-7003 Turbo code error correction decoder
    COM-5102 Gigabit Ethernet LAN adapter COM-300x RF/IF/Baseband receivers
    COM-3504 Dual Analog<->Digital Conversions, 16-bit 250MS/s DACs, 12-bit 150 MS/s ADCs

    Other Demodulators
    Specifications (353 KB)
    VHDL Source Code / IP Overview
    $320 Ready-to-use Module
    $750 IP core, VHDL source, unlimited use