Turbo Code Error Correction (Encoder / Decoder)

KEY FEATURES
  • Full duplex turbo code encoder / decoder
  • Programmable rate: 1/3, 1/2, 2/3, 3/4, 4/5, 5/6, 6/7
  • Block length: up to 2032 bits
  • Speed up to 16.5 Mbps (decoded bits) / 49.5 Mbps (encoded bits)
  • Includes unique word for automatic frame synchronization
  • 4-bit soft-quantization input
  • CRC16
  • Frame Error Rate performance:
    • FER = 1E-2 @ Eb/No = 1.4 dB (2032-bit frame, rate 1/3)
    • FER = 1E-3 @ Eb/No = 1.6 dB (2032-bit frame, rate 1/3)
    • FER = 1E-2 @ Eb/No = 3.1 dB (768-bit frame, rate 3/4)
    • FER = 1E-3 @ Eb/No = 3.5 dB (768-bit frame, rate 3/4)
  • Ancillary test features: PRBS11 test sequence, BER tester, Frame Error Rate counter
  • Single 5V supply. Connectorized 3”x 3” module for ease of prototyping. High-speed 98-pin connectors (left, right). Interfaces with 3.3V logic

  • ComBlock COMPATIBILITY LIST
    Full Duplex
    COM-1800 FPGA development platform
    COM-1202 PSK/QAM/APSK modem
    COM-5003 TCP-IP / USB Gateway
    COM-5004 IP router
    Half Duplex
    COM-1519 DSSS modulator
    COM-1518 DSSS demodulator

     

    COM- 7003
    Error correction codec, 120 Mbps
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    Reed Solomon encoder
    Documentation
    Specifications (895 KB)
    Schematics
    VHDL Source Code / IP Overview
    $375 Ready-to-use Module
    $850 COM-7003SOFT IP core, VHDL source, unlimited use