Dual Analog-to-Digital Conversion 135 MSamples/s

KEY FEATURES

COM-3009: dual 12-bit, 135 MSamples/s

Built-in 24 dB gain control to increase the effective ADC dynamic range

Sensitivity: -26 dBm / 31mVpp minimum input level for full scale output samples

Input bandwidth: 200 MHz

Sampling rate is user-selectable in the range from 40 to 135 Msamples/s

Sampling clock can be:

• External
• Programmable locked onto an internal frequency reference
• Programmable locked onto an external (ultra-stable) frequency reference

Multiple receivers can be synchronized in terms of the ADC sampling rate by using external frequency references

One of several anti-aliasing filter bandwidth options -B can be selected at the time of ordering:

• 50 MHz bandpass (default)
• no filtering (for flexible IF undersampling)
• custom 70 MHz or 140 MHz centered filters

SMA connectors. Single 5V supply. Connectorized 3”x 3” module for ease of prototyping

ComBlock COMPATIBILITY LIST

Input	Output
	COM-1001, COM-1018, COM-1027 demodulators (@ 40 MSamples/s)
	COM-8002 High-speed data acquisition. 256MB, 1Gbit/s, 40 Msamples/s
	COM-1023 AWGN noise generator (@ 40 MSamples/s)
	COM-1024 Multipath generator (@ 40 MSamples/s)
	COM-1200, COM-1400 FPGA development platforms (full range)
	COM-2001 Dual D/A converter (baseband)(40-105 MSamples/s)