END TO END TESTS

Test Configurations
Note: This section is being replaced by a more user-friendly "basic settings" section, whereby entire ComBlock assemblies can be imported directly from a settings file without having to enter registers manually.

QPSK modulator COM-1002 -> Dual D/A converters COM-2001 -> L-band modulator COM-4002 -> 30 dB attenuator -> L-band receiver COM-3002 -> QPSK demodulator COM-1001 -> BER measurement COM-1005.

Test configuration example: 950 MHz center frequency, 19.8 Mbit/s, QPSK, no frequency error, noiseless, external 10 MHz clock reference.

Back to back modem operations can be verified at RF. The QPSK modulator is configured in signal generator test mode whereby a periodic 2047-bit sequence is being transmitted. The digital samples are converted to analog, up-converted to 950 MHz RF. A 30 dB attenuator is placed between the 4002 output and 3002 input. A 10 MHz reference clock (like the one available in the back of many spectrum analyzers) is split and fed into the 4002 and 3002 modules. The end to end BER is measured using the COM-1005 module. The registers settings are as follows:

• COM-1002A: A2 70 FD 00 00 00 FF 00 D6 00
• COM-2001: no configuration
• COM-4002: 80 D9 9F 38 FF 03 05
• COM-3002: 80 D9 9F 38 01
• COM-1001A: 52 B8 7E 00 00 00 83 10
• COM-1005: 0D

Proper operation can be verified as follows:

(a) using an oscilloscope probe

• COM-2001 probe capacitors C3 and C24 close to the output SMA connectors. The I/Q baseband signals are shown with amplitude 1V peak-peak and approximately 0.85 - 1V mean voltage. (the same signals are at the SMA connector output).
• COM-3002 TP1/TP2. The I/Q baseband signals after RF transmission are seen there. The range is 1V peak-peak, indicating proper AGC operations. These signals are similar to those probed at the modulator in the previous step, with the exception of phase rotation.
• COM-4002 TP2 SYNC-LOCK test point is low, indicating that the built-in frequency synthesizer is locked to the external 10 MHz frequency reference.
• COM-3002 PLL LOCK test point is low, indicating that the built-in frequency synthesizer is locked to the external 10 MHz frequency reference.
• COM-1001 TP1 is high, indicating demodulator carrier lock
• COM-1005 TP1 is high, indicating synchronization with the 2047-bit periodic test pattern
• COM-1005 TP3 is low, showing no bit error pulse
• COM-1005 TP4 shows regular periodic start of frame pulses every 2*2047 bits = 206.76 us.
  Trigger on COM-1005 TP4, and compare demodulated bits (COM-1005 TP5/TP6) with the transmitted bits (COM-1002 TP2/TP3). The bits should be identical, taking into account processing delay and inversions due to QPSK phase ambiguity.

(b) from the ComBlock control center check the BER (COM-1005 status).
It will show no bit errors (REG 1 through 4) and the synchronization bit (REG5 bit0) is high.

LAN COM-5001 -> LAN COM-5001

This test setup aims at demonstrating the TCP-IP transmission from one network data souce to another network data sink. The incoming data is received over the LAN using TCP-IP at port 1024. The TCP-IP data stream is converted to a 40 Mbit/s synchronous serial data stream at the interface between the two COM-5001 modules, then converted back to TCP-IP packets. The packets are placed for reading at TCP-IP port 1026.

First configure each COM-5001 with a unique TCP-IP address consistent with your LAN network. Here we assume that local addresses are in the form 172.16.1.X, where X = 1 to 254. The first COM-5001 is assigned address 172.16.1.128, and the second COM-5001 assigned the address 172.16.1.129. Please check with your network administrator for IP mask and available IP addresses.

The registers settings are as follows:

first COM-5001: AC 10 01 80 FF FF FF 00 AC 10 01 01 00 00 00 00 00 00 00 00 00 81 00
second COM-5001:AC 10 01 81 FF FF FF 00 AC 10 01 01 00 00 00 00 00 00 00 00 81 00 01

Proper operation can be verified as follows:
(a) Upon connecting the LAN cable to the RJ-45 connector, the yellow LED close to the connector is ON.

(b) Using the ComBlock Control Center, go to the communication setup window, select LAN/IP and

• ping the first address (172.16.1.128 in this example). The ping test should indicate 4 out of 4 successes.
• ping the second address (172.16.1.129 in this example). The ping test should indicate 4 out of 4 successes.

(c) Using two terminal emulators such as Hyperterminal:

• open two TCP-IP connections, one to address 172.16.1.128, port 1024, the other to address 172.16.1.129 port 1026. The Hyperterminal should indicate 'connected' in the lower left corner of the window.
• Configure the sending Hyperterminal to display the characters sent (ASCII setup "Send line ends with line feeds" and "echo characters typed locally").
• Send a large text file using the menu "Transfer | Send text file".
• Observe the file being received in the other Hyperterminal window. Comparing transmit and received file should show no errors.
• Note that the last characters are 'stuck' in the LAN buffer due to the HDLC packet implementation. At the end of a transfer, the transmitter should be flushed with 4096 NULL characters.

LAN COM-5001 -> Turbo Code Encoder COM-7001 -> Turbo Code Decoder COM7001 -> LAN COM-5001. Why is this configuration illegal?

This test configuration cannot work because there is a flow-control disconnect between the Turbo code encoder and the Turbo code decoder. The COM-7001 turbo code encoder does not have any control register to specify the data rate. The Turbo code decoder requests samples as fast as possible. With a 40 MHz clock, the turbo code encoder will always negotiate a 20 Mbit/s throughput, which is beyond the maximum throughput capability of the turbo-code decoder (the actual throughput depends on the code selection and the number of decoding iterations).

In a typical transmitter configuration, the digital modulator at the end of the modulation chain sets the desired data rate.

Dual band 915 MHz/2.4GHz receiver COM-3001 -> Data acquisition COM-8002 -> LAN COM-5001

This assembly captures a 2.45 GHz input RF signal in the range - 50 dBm to -10 dBm, down-converts it to baseband, digitize its in-phase (I) and quadrature (Q) samples with 10-bit each and store it into the COM-8002 SDRAM. The stored samples are then downloaded to a binary file over the LAN for post processing.

First, use an RF signal generator to generate a carrier at 2.45 GHz at -50 dBm. Connect this signal to the COM-3001 receiver input.

Second, configure the COM-5001 with a unique TCP-IP address consistent with your LAN network. Here we assume that local addresses are in the form 172.16.1.X, where X = 1 to 254. The COM-5001 is assigned address 172.16.1.200. Please check with your network administrator for IP mask and available IP addresses.

The registers settings are as follows:

• COM-3001: C0 CA 89 36 80 08 08 92 02
• COM-5001: AC 10 01 C8 FF FF FF 00 AC 10 01 01 00 00 00 00 00 00 00 00 08 00 01
• COM-8002: use the comblock control center to configure as follows 1 Million samples, AGC enabled, input width 20 bits.

Proper operation can be verified as follows:

(a) Using an oscilloscope:

• probe the I and Q baseband analog signal at resistor R5 and R27 on the COM-3001. The signal should be a sinewave at a frequency of a few KHz (i.e. the difference between the RF signal generator frequency and the COM-3001 internal local oscillator locked on a 50 ppm stability crystal). The amplitude should be 1V peak-to-peak.
• Increase the input signal level to -40 dBm. The baseband signals amplitude should remain at 1V peak-to-peak. This demonstrates that the AGC works.

(b) Using the ComBlock Control Center, send the captured samples to a binary file.
After extracting the complex 2 * 10-bit samples, one should observe two sinewaves with 90 degrees phase offset.

QPSK modulator COM-1002 -> Dual D/A converters COM-2001 -> Dual band 915 MHz / 2.4 GHz modulator COM-4001 -> 30 dB RF attenuator -> Dual band 915 MHz / 2.4 GHz receiver COM-3001 -> QPSK demodulator COM-1001 -> BER measurement COM-1005.

Test configuration example: 2.499 Mbit/s, QPSK, noiseless, internal clock references.

This configuration is peculiar in the sense that the COM-4001 and COM-3001 frequency synthesizers are locked onto internal frequency references with 50ppm (typical) stability. The resulting carrier frequency difference between transmitter and receiver can be as high as +/- 245 KHz. Therefore, the demodulator extended acquisition feature must be enabled, at the expense of acquisition time.

A 30 dB attenuator is inserted between the COM-4001 and COM-3001.

The registers settings are as follows:

• COM-1002A: FF FF 1F 00 00 00 FF 00 96 00
• COM-2001: n/a
• COM-4001: C0 CA 89 36 80 08 08 92 FF 03 06
• COM-3001: C0 CA 89 36 80 08 08 92 02
• COM-1001A: FF FF 0F 00 00 00 B2 1C
• COM-1005: 0D

(a) using a spectrum analyzer, verify that the COM-4001 output spectrum is centered at 2.45 GHz, has a transmitter power of approximately -15 dBm, 3 dB bandwidth of 1.25 MHz, and low sidelobes (-55 to -60 dB).

(b) using an oscilloscope

• probe R7/R25 on COM-3001. These are the received baseband signals I and Q respectively at the A/D converter input. Verify that the AGC properly controls the peak-to-peak amplitude at 1Vpp.
• probe pin B13 at the interface between COM-3001 and COM-1001A. A pulse width modulated signal should be observed. This is the AGC controlling the receiver gain.
• probe test points TP3 (reconstructed carrier) and TP1 (carrier lock) on the COM-1001 demodulator. Observe the receiver frequency sweep during acquisition (immediately after power up). The receiver will sweep its center frequency until lock is detected. Given the large frequency uncertainty, this process can be slow. Once the lock detect signal goes high, measure the center frequency offset at TP3.
• To make acquisition faster, the center frequency offset can be compensated for by programming it into the COM-1001 (REG3/4/5) or COM-1002(REG3/4/5). Once this is done, reduce the sweep range from 50% to 6% (COM-1001 REG7).
• probe test point TP1 on the COM-1005 BER measurement. This test point is high when the transmitted test sequence (PRBS-11) is properly demodulated.

DSSS modulator COM-1019 -> Dual D/A converters COM-2001 -> L-band modulator COM-4002 -> 30 dB attenuator -> L-band receiver COM-3002 -> DSSS demodulator COM-1018 -> BER measurement COM-1005.

Test configuration example: 10 Mchip/s, QPSK, 317.4 Kbps, Maximal length sequence 63, no frequency error, noiseless.

Back to back direct-sequence spread-spectrum modem operations can be verified at RF (950 MHz). The DSSS modulator is configured in signal generator test mode whereby a periodic PRBS-11 (2047-bit) sequence is being transmitted. The baseband modulated signal is up-converted to L-band, attenuated by a 30 dB attenuator, then down-converted to near baseband. A 30 dB attenuator is placed between the 4002 output and 3002 input. To simplify testing, the L-band modulator and L-band receiver are locked onto the same external frequency reference: a 10 MHz reference clock (like the one available in the back of many spectrum analyzers) is split and fed into the 4002 and 3002 modules. The end to end BER is measured using the COM-1005 module. The registers settings are as follows:

• COM-1019: 00 00 20 3F 00 00 02 21 00 00 00 00 00 00 00 00 FF 00 96 0C
• COM-2001: no configuration
• COM-4002: 80 D9 9F 38 FF 03 05
• COM-3002: 80 D9 9F 38 01
• COM-1018: 00 00 20 3F 00 00 02 21 00 00 00 00 00 00 00 00 A2 05
• COM-1005: 0C

(a) using an oscilloscope probe, verify that the carrier and code tracking loops are locked:

Code tracking lock: in the COM-1018 demodulator, Pin J4/B7 should be high. Also compare J4/A9 (spreading code replica) and J4/B9 (modulated I). They should be either equal or inverted for the duration of a bit (63 chips).

Carrier tracking lock: Pin J4/A7 should be high. With the configuration above, the frequency error tracked in the demodulator should be exactly zero. Check pin J4/A8 with an oscilloscope. It should not show periodic transitions. To really verify carrier lock, create a small frequency offset in the transmitter or receiver (say 10 Hz). Check again pin J4/A8: it should show a 10 Hz square wave.

(b) from the ComBlock control center check the BER (COM-1005 status).

It will show no bit errors (REG 1 through 4) and the synchronization bit (REG5 bit0) is high.